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Senior FPGA/RTL Architect/Engineer (GB)

Signaloid

Signaloid

IT
Cambridge, UK
Posted on Jun 17, 2024

Signaloid provides a computing platform that tracks data uncertainties dynamically and throughout computations in execution workloads. Our computing platform uses deterministic computations on in-processor representations of probability distributions, to enable orders of magnitude speedup and lower implementation cost for computing tasks traditionally solved using Monte Carlo methods. The platform is available as a cloud-based computing engine that lets you run tasks via a cloud-based task execution API. We also provide on-premises and edge-hardware implementations of our computing platform for customers who want to use their existing on-site infrastructure and for use cases requiring operation without connection to the cloud.

Our platform is the most cost-effective way to engineer uncertainty quantification applications and is also the fastest way to run uncertainty quantification tasks, for key use cases. Workloads ranging from options pricing and portfolio modeling in finance, to uncertainty quantification for materials modeling and photonics simulation in engineering, often run an order of magnitude or more faster, compared to Monte-Carlo-based implementations running on high-end AWS EC2 instances.

Our team consists of contrarian engineers with combined research, engineering, and leadership experience from Apple, ARM, Bell Labs, CMU, University of Cambridge, IBM Research, MIT, NEC Labs, and University of Oxford. Find out more and try out the Signaloid uncertainty-tracking computing platform by signing up for free for our developer platform, at https://get.signaloid.io.

Role Description

Within the first year in this role, you will:

  • Be responsible for the RTL hardware design, FPGA prototyping, cloud-based FPGA deployment, and custom silicon implementation of new microarchitectural components of Signaloid's compute engine.
  • Lead the implementation of improvements in performance, reliability, and implementation quality of existing and new microarchitecture components in both C/C++ and Verilog RTL.
  • Be responsible for the tools for functional verification of the microarchitecture of Signaloid's processor platforms.
  • Be responsible for documenting and communicating architectural design decisions to the wider team.

After a year in this role, you will have the opportunity to:

  • Lead new architectural design work across Signaloid's compute architectures.
  • Lead the implementation of your own architectural ideas in collaboration with a larger team.
  • Contribute to the strategic direction of Signaloid's computing platforms.
  • Expand your role to encompass other areas in which you have demonstrated exceptional competence.